
- European Regional Development Fund (ERDF)
- 1 Jul 2018 to 31 Aug 2020
- Hungary
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Operation co-funded by EU cohesion policy (European Regional Development Fund (ERDF)) under the programme Competitive Central-Hungary - ERDF/ESF (2014HU16M2OP002), managing authority: Nemzetgazdasági Minisztérium. Beneficiary: MedioTrade Műszaki Fejlesztő és Kereskedelmi Korlátolt Felelősségű Társaság. Location: Budapest (NUTS HU110); Hungary. Budget: total eligible expenditure EUR 234,364.72; EU co-financing EUR 105,932.85 (co-financing rate 45.2%), as stated by the source. Runs 2018-07-01 to 2020-08-31. Source: Kohesio, EU cohesion policy projects managed by national and regional authorities (not CORDIS); selected because its summary names quantum technology. Summary from Kohesio (English machine translation by the source): A) In the subject area, we have submitted a patent earlier, and we have already launched the European and US phases. Based on the patented idea, we implemented a FPGA-based timing device, a laboratory-operated (TRL5-6) prototype of the time-to-digital converter chip and server circuits. We have submitted a European H2020 SME1 tender to analyse the market needs of the completed tool, which we won. The aim of this tender was to assess the market opportunities and define the main directions of development. The tender was successfully closed and a detailed business plan was created, in which we stated that one of the professional directions would be the implementation of an NI compatible measuring panel. This is an application of our professional achievements that can reach many users and take advantage of our unique technology. The measuring panel to be implemented uses standard interfaces, so it is compatible with NI devices, which are used in many locations around the world for automation and industrial process control and measurement. The unique competitive advantage of our tool is that it has more parallel channels than competitors and has a more accurate and higher resolution. B) Electronics Design — In this activity, our goal is to embed the TDC chip developed by us in an environment that meets industrial standards and is a NI (National Instruments) compatible device with the right hardware and software interface. Proper implementation of power circuits, oscillator farms, wiring, power supply and communication of essentially analogue and digital FPGAs should be solved. Integration of memo if necessary. The design shall also take into account the appropriate input interface, signal matching, wiring design and the efficient hardware eligibility of the calibration process. We would like to implement two hardware different measuring card designs, which are fundamentally different in the input channel number, but this difference entails a change in the type and size [shortened; the full text is on the Kohesio page]
Source: Kohesio (EU cohesion policy projects), European Commission, Directorate-General for Regional and Urban Policy (DG REGIO). Retrieved 2026-10-21. Licence: CC0 1.0 (Cohesion Open Data Platform, dataset 2014-2020 Kohesio projects). Selected metadata, adapted presentation; the publisher's record is authoritative. No endorsement by the source is implied. Licence: public domain dedication (CC0 1.0).
AI-assisted summary: The project involves a high-resolution multi-channel time-to-digital converter sensor, co-funded by the EU under the Competitive Central-Hungary programme. It was managed by MedioTrade in Budapest, with a total budget of EUR 234,364.72 from July 2018 to August 2020. Suggested technology pillar: sensing. Generated by AI from the public source text; it may contain errors and the original source is authoritative.
Source: kohesio.ec.europa.eu · checked 21 Oct 2026 · AI-assisted summary