Draft for consultation. This is the draft Strategic Research and Industry Agenda of the second phase of the public consultation, not an adopted agenda: chapters, goals and figures may change.
Public consultation: closed on 2026-10-02, as stated on qt.eu. Comments were collected per chapter through the consultation page. qt.eu gives 2 October 2026 as the closing date for every chapter (consultation page and news post of 19 September 2026, read on 27 October 2026); the draft PDF (page 145) states 16 to 30 September. Responses went through one form per chapter on the consultation page.
Merges computing and simulation, puts more weight on fault-tolerant computing while keeping analogue, annealing and NISQ routes, and sets platform targets for logical qubits, circuit depth and clock rate, plus goals for algorithms, software and HPC integration.
Infrastructure, Standards and benchmarks, Security, space and defence, Supply chain
Drafting status: The chair notes that some sections are not yet fully developed and invites input; the KPI table lists indicators without values and the timeline is still to be generated. Page 4
Squares are goals, circles are dated milestones; the numbers match the list below.
Showing 0 of 17 items.
Milestoneby 2030
Every platform should reach beyond-classical ("quantum supremacy") performance on a synthetic benchmark in Europe by 2030, as the entry point before useful applications.
Neutral atoms: a fully fault-tolerant computer with more than 1000 logical qubits, a universal logical gate set, circuit depth above 10^12 and a logical clock rate above 1 kHz, integrated into European HPC and cloud.
Photonic: manufacture photonic modules for fault tolerance and build HPC-integrated processors with more than 1000 logical qubits, circuit depth above 10^12 and a logical clock rate above 100 kHz, modular and networked.
Spin qubits: a fully fault-tolerant computer with more than 1000 logical qubits, circuit depth above 10^12, a logical clock rate above 100 kHz and a form factor at a scale of 10 m2.
Superconducting: run fully error-corrected algorithms on hundreds of qubits without unwieldy overhead, by making the best qubits first and then scaling; analogue and annealing processors show certified utility within HPC workflows.
Verified quantum advantage in 3 to 5 application areas against state-of-the-art classical methods, and complete fault-tolerant resource estimates for at least 20 industrially relevant problems.
European software stacks become the default environment for hybrid quantum-classical workloads on EuroHPC, with domain applications validated against classical baselines at industrial scale.
Operate several networked quantum computing infrastructures integrated with HPC and cloud, connecting different kinds of processors through dedicated interfaces.
Deliver verified quantum advantage through quantum simulation, maturing end-to-end materials-simulation workflows in which fermionic simulators work inside industrial modelling pipelines.
Leading platforms routinely show beyond-classical performance on synthetic benchmarks and run fault-tolerant quantum memory beyond break-even, with access to prototypes.
Beyond-classical performance and beyond-break-even error correction for all relevant platforms; consolidation at or above TRL 5; standardised interface definitions.
Quantum utility demonstrated, computers running in production mode and broad industrial uptake, moving from TRL 6 to TRL 8 with large pan-European co-development centres.
Milestoneby 2030 (high risk), by 2035 (medium risk)
The draft expects post-quantum cryptography to become mandatory in the EU for high-risk uses by 2030 and medium-risk uses by 2035, and calls research into the security of these schemes strategic.
KPIs of Computing and simulation: values as stated in the draft
Objective and indicator
2026 baseline
2030 target
2035 target
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Quantum utility Number of quantum utility demonstrations with a quantum error corrected gate-based (digital) quantum computerThe draft lists this indicator without values.